1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, a supply method for supplying multiple supply voltages to cells in the semiconductor integrated circuit, and a record medium for storing a supply program of multiple supply voltages in a semiconductor integrated circuit, and more particularly, it relates to the technology of them capable of integrating the semiconductor integrated circuit with a high density that operates under the multiple supply voltages.
2. Description of the Prior Art
FIG. 15 is a block diagram showing a configuration of a conventional semiconductor integrated circuit. This block diagram shows a part of the conventional semiconductor integrated circuit. In this conventional semiconductor integrated circuit, a plurality of cells 3 are arranged or placed per cell row or per cell column. In each cell row or cell column, a plurality of electrical wires such as an electrical wire 5 for a low supply voltage VDDL, an electrical wire 7 for a high supply voltage VDDH, and an electrical wire for a ground source (not shown) are formed according to demand.
Each cell 3 receives a voltage or voltages from the supply voltage VDDL, or the supply voltage VDDH, or both them through the electrical wires 5 and 7 in order to perform operation. Accordingly, the conventional semiconductor integrated circuit has the configuration in which the electrical wires 5 and 7 are formed on a cell column even if this cell column requires only one supply voltage.
FIG. 16 is a circuit diagram showing a general configuration of a cell of a level converter (LC) for converting the voltage potential of a signal. In general, this cell of the LC requires multiple supply voltages. The level converter LC shown in FIG. 16 has an N well region 59. Two P channel type transistors are formed and connected on the N well region 59. The drain of each P channel type transistor is connected to each N channel type transistor. Furthermore, both the electrical wire 5 of the low supply voltage VDDL and the electrical wire 7 of the high supply voltage VDDH are formed on the N well region 59. A power supply section 61 for the N well region 59 is connected to the electrical wire 7 of the high supply voltage VDDH. Thus, the high voltage may be supplied to the N well region 59 through the power supply section 61.
In the conventional semiconductor integrated circuit, it is required to have the configuration in which a plurality of electrical wires are formed in each cell column in advance or to manually design the electrical wires in order to supply desired supply voltages to a target cell, arranged in the cell column, such as the level converter LC that requires the multiple supply voltages.
However, because it takes long time to manually design the electrical wires and requires a lot of design work for designers, it is difficult to design a large integrated semiconductor chip manually. Furthermore, the area of a cell is increased when a plurality of electrical wires for supply voltages are formed on each cell column, because a width or a diameter of each of the plurality of electrical wires for the supply voltages is larger than that of a normal signal wire for transferring signals. This causes to increase the area of the semiconductor chip of a semiconductor integrated circuit.